The emitter switching configuration is a circuit configuration in which a low voltage transistor of the MOS or bipolar type interrupts the emitter current of a high voltage power transistor in order to switch it off, with the power transistor typically being a bipolar transistor. A semibridge configuration is a similar circuit configuration having a terminal which permits external connection to the collector of the low voltage transistor.
Heretofore, when low voltage transistors of the bipolar type have been employed in an emitter switching configuration, the circuit has been fabricated with discrete components. However, a low voltage transistor of the MOS type has been employed in the emitter switching configuration, with the components being integrated in the same chip of semiconductor material. An example of an integrated structure with a low voltage transistor of the MOS type in the emitter switching configuration is described in European Patent Application No. 0 322 041.
In addition to the advantages which an integrated circuit generally has, compared with an analog circuit provided with discrete components, an integrated form of an emitter switching circuit configuration:
has increased ruggedness of the bipolar power transistor with regard to the possibility of any reverse secondary breakdown phenomena (Es/B);
combines the speed performance of the low voltage transistor with the voltage and current capabilities of the driven transistor; and
allows the direct driving of the system with linear logic circuits through the base of the low voltage transistor.
The integrated structure of a bipolar power transistor and a low voltage bipolar transistor in the emitter switching or semibridge configuration in accordance with the present invention allows the above advantages. In addition, as compared with the integrated structure with low voltage transistor of the MOS type described in the above-mentioned European patent application, it has the further advantage of being made by simpler and more economical manufacturing processes.